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IP Asset Management . . .

Uncollected IP Royalties
IP usage reporting in designs is often unreliable, leading the industry to audit designs to verify royalty rates. These add to the overall cost of development while going against the spirit of cooperation within an ecosystem.

Warranty Violations Caused by the Unauthorized Modification of IP
Unauthorized changes to hard IP blocks can cause mask or device failure potentially costing millions of dollars and the loss of a key customer.

Opportunities for IP Theft
Designs for medium technology, high volume integrated circuits may become the new target of IP thieves. Strategic designs such as those used in military applications are also at risk.
Data Trust Management . . .

Maintaining Layout Equivalence from Library Development through Tapeout
The migration to OASIS has opened the door to the re-examination of what has been meant by layout equivalence.

A Growing Class of Undetectable Design Errors
Block-level design and IP reuse have introduced a new class of design errors, undetectable even by today's best practices in design verification and data management.

New Library Releases and Growing Design Conservatism
Every time a vendor releases a new library version, design teams are instructed to use it immediately. The size and complexity of today's libraries are such that teams cannot tell how adoption of the latest release will impact their design.
OASIS  Compliance . . .

Fabless Design Houses, IDMs and Merchant/Captive Mask Shops Adopt OASIS
The growing number of 40-50 GB GDSII design files is leading to increased use of the OASIS format at foundries. However, business practices and priorities are slowing its full adoption.
"... The Company's technology plays a substantial role helping us isolate and fix problems before they become silicon issues ..."

Lisa Fisher
Engineering Manager
Texas Instruments
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Yotta Helps Audit and Track the Quality and Ownership of Data in the Integrated Circuit Design Flow
We develop software solutions that address the growing numbers of IC design data compliance, data trust and Intellectual Property (IP) asset management problems.
OASIS® is a Registered Trademark of Thomas Grebinski
IC Data Management Technology . . .

Intelligent Cell, Block and Chip-level IP Version Tracking Using Smart Signatures
Yotta has developed a data engine that captures and reports the developing functional state of an integrated circuit design from SPICE through Library development, Logic and Physical Design/Tapeout. Why is this significant?
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Welcome to Yotta Data Sciences
 
Smart Signatures
Yotta Data Sciences has developed a technology called Smart Signatures. It is a form of Artificial Intelligence with an Intelligent Agent ('Agent'). The Agent can peer into PBs of data in multiple data formats. It can comprehend what is there from a designer's perspective. It indexes and cross references what it finds to the granularity of the content within the layers of a leaf cell.

To each element of an index (e.g. an element within a single cell LEF or OASIS view), the Agent assigns a byte-sensitive signature. As the elements of information change within these indices, the signatures change.

Yotta's technology can report what it finds as a single, referential, searchable and archival, view of a design, multiple designs or a view of all of the developing design information within the semiconductor ecosystem. At any given moment it'll be both current and contextual in its expression. Everyone who has this technology in use will be certain that its view is an up to the moment globalized expression of what had been used and what is actually in use from the first release of a factory's PDKs though library development, logic design and synthesis, floor planning, layout integration and tapeout.
OAS = OASIS
GDS = GDSII
Workflow Auditor Point Tools
Developing Computationally Intensive, Production-worthy, Integrated Circuit Design and Manufacturing Automation Technology ahead of the curve . . .

Yotta's Stress Test Cases

Since Moore's Law became the touchstone driving the advanced design and manufacture of integrated circuits, developers of the underlying technology have had to rely on a lot of guesswork about what it would mean to to meet the next generations of the law. I big part of the problem has been that even the scientists and engineers closest to the the history of the past successes did not know enough to share what would be needed to automate the design and manufacturing processes the next time and the next . . . 
© 2008-2018 Yotta Data Sciences, Inc. All rights reserved.
NEW at Yotta Data Sciences
* US Patents 9,122,825, 8,555,219, 8,266,571 and 7,685,545.
International Patents: China 200980129771.8, Japan  4768896, Korea 10-1580258
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