Every semiconductor process generation requires more detail in the design process. More electrical effects must be modeled; device performance varies on a transistor-by-transistor basis; and yield issues are no longer "the foundry's problem." For early adopters of advanced process nodes, the now-common updates of process and library information bring increasing complexity and risk. Today there is no way to evaluate those risks fully.
Every new library release comes with a statement that it supersedes all previous releases. For a team late in the design process, a library with timing changes may not allow performance goals to be met without considerable rework. Timing closure is difficult to achieve, and a design team may choose to stay with an earlier release if they fear that it would cause design closure problems- even if the newer release is supposed to improve performance or yield.
Today design teams analyze new library releases manually to determine their impact on a late-stage design. This can be very difficult for System-on-Chip (SoC) designs, which may have already-completed blocks with their own copies of library circuits. It is impossible for pre-certified hard IP from third-party sources- internal timing information is not available, so designers cannot tell whether cells with new versions are on the critical path or not.
There are no tools today which can determine the significance of changes in a new library release. As a result, design teams must rely on the judgment of their project lead. All too often, the decision is made to stay with an older version of a library, relying on design margins (over-designing) to compensate for the uncertainty of performance or yield. This "design conservatism" gets designs out the door, but at a cost of competitiveness.
Yotta's Data Trust Management technology can automatically detect, isolate and report what has changed and where the changes had occurred from the leaf cell level throughout the cell hierarchy. The audit is fast (800-1200 MB per minute) and the report architected to show the results in terms familiar to the design team. Yotta's technology can index an entire new library release containing hundreds of thousands of cell views in matter of minutes,
IP LIBRARY RELEASES DRIVE DESIGN CONSERVATISM
"... The Company's technology plays a substantial role helping us isolate and fix problems before they become silicon issues ..."
OASIS® is a Registered Trademark of Thomas Grebinski
IP Library Releases Drive Design Conservatism
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* US Patents 9,122,825, 8,555,219, 8,266,571 and 7,685,545.
International Patents: China 200980129771.8, Japan 4768896, Korea 10-1580258
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